发明名称 Verfahren zur Herstellung von integrierten MOS-Schaltungen
摘要 In a process for manufacturing MOS circuits, a PBL (polysilicon-buffered-LOCOS) process is simplified in that the pad oxide (3) precipitated during the PBL process is used as gate oxide. In addition, the polysilicon layer (4) precipitated during the PBL process is used as part of the gate polysilicon.
申请公布号 DE19733349(A1) 申请公布日期 1999.02.18
申请号 DE19971033349 申请日期 1997.08.01
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 WIDMANN, DIETRICH, DR.-ING., 82008 UNTERHACHING, DE;KERBER, MARTIN, DR.RER.NAT., 81827 MUENCHEN, DE
分类号 H01L21/28;H01L21/762;(IPC1-7):H01L21/762;H01L21/823;H01L21/824 主分类号 H01L21/28
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