MULTICHANNEL RADIO DEVICE, A RADIO COMMUNICATION SYSTEM, AND A FRACTIONAL DIVISION FREQUENCY SYNTHESIZER

摘要

Known are fractional division synthesizers for multichannel radio devices. A new architecture for such a type of synthesizer is proposed not having the drawbacks of such known synthesizers and having the same phase noise properties as ordinary integer divide by N synthesizers. The novel architecture has a main PLL with a first integer frequency divider in its feedback loop and further an auxiliary PLL having a second integer frequency divider in its feedback loop.