发明名称 DATA REPRODUCING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To early take bit synchronism to a degraded input signal. SOLUTION: When the repetition of bits in the input signal is detected by an S/P converter 6 for sampling the input signal with the rising edge of a reproducing clock provided by a digital control oscillator 3 without detecting the bit repetition of the input signal through an S/P converter 5 for sampling the input signal with the falling edge of the same reproducing clock, the reproducing clock is inverted by controlling the digital control oscillator 3 so that a normal bit synchronizing signal can be provided from the S/ P converter 5.
申请公布号 JPH1141223(A) 申请公布日期 1999.02.12
申请号 JP19970203961 申请日期 1997.07.15
申请人 NEW JAPAN RADIO CO LTD 发明人 SUKA MUNEHIRO
分类号 H03L7/06;H04L7/033 主分类号 H03L7/06
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