METHOD FOR VERIFYING SEMICONDUCTOR INTEGRATED CIRCUIT, DEVICE FOR VERIFYING SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER READABLE RECORDING MEDIUM RECORDING VERIFICATION PROGRAM OF SEMICONDUCTOR INTEGRATED CIRCUIT,申请号JP19970198959-传众专利搜索

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发明名称	METHOD FOR VERIFYING SEMICONDUCTOR INTEGRATED CIRCUIT, DEVICE FOR VERIFYING SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER READABLE RECORDING MEDIUM RECORDING VERIFICATION PROGRAM OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号	JPH1139377(A)	申请公布日期	1999.02.12
申请号	JP19970198959	申请日期	1997.07.24
申请人	TOSHIBA CORP	发明人	KITAOKA MIYAKO;KUWAYAMA KATSUMI
分类号	H01L21/82;G06F17/50;(IPC1-7):G06F17/50	主分类号	H01L21/82
代理机构		代理人
主权项
地址

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