发明名称 |
Self-timed circuit having critical path timing detection |
摘要 |
A self-timed circuit for use a clocked logic system is disclosed that comprises a timing detection device for detecting a timing margin of a critical path, the critical path being a path that limits the speed of the system. The circuit further comprises increase logic for increasing the speed of the system clock if the timing margin allows it, and decrease logic for decreasing the speed of the system clock if the timing margin indicates such a need. The increase and decrease logic comprise threshold generator and reset logic, and clock control logic.
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申请公布号 |
US5870404(A) |
申请公布日期 |
1999.02.09 |
申请号 |
US19960694120 |
申请日期 |
1996.08.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FERRAIOLO, FRANK D.;GERSBACH, JOHN E.;MASENAS, JR., CHARLES J.;ROHRER, NORMAN J.;SINGER, BRUCE W. |
分类号 |
G06F1/08;(IPC1-7):G06K5/04;G11B5/00 |
主分类号 |
G06F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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