Distortion compensation for a capacitively loaded follower

摘要

The odd harmonic distortion components in the output signal of a capacitively loaded follower transistor is reduced by means of an additional transistor inserted between the emitter of the follower transistor and the bias current source of the follower transistor. A second follower transistor receives the same input signal as the follower transistor and has its emitter coupled to the emitter of the additional transistor via a compensation capacitor. The current through the compensation capacitor is added to the output current and compensates for the odd harmonic distortion.