| 摘要 |
<p>A voltage tolerant bus hold latch comprises a first buffer transistor (N5), a sense transistor (P1), a low voltage latch (206), a node voltage controller (208), and a pull-up circuit (210). The output of the node voltage controller is coupled to control the operation of the pull-up circuit. The pull-up circuit is coupled to the supply voltage for the lower voltage circuitry, and has another control input coupled to the output of the low voltage latch. The pull-up circuit is selectively activated to pull the input of the latch to a high voltage level. The node voltage controller acts as voltage divider to maintain a voltage difference across the gate to drain of the pull-up circuit in order to maintain the operating tolerance.</p> |
