发明名称 Leiterrahmen und in Harz versiegelte Halbleitervorrichtung dafür
摘要 A semiconductor element mounting die pad (14) has a plurality of slits (18) and dimples (19) disposed on a flat surface of the die pad (14). The slits (18) penetrate from the face to the back side of the semiconductor element mounting die pad (14) and are formed, for example, by punching or chemical etching method. The forming method is preferably the same as the method of forming the lead frame (11). Pairs of slits (18) of the same shape are (18) formed separated by a distance equal to the width of dimples (19). The rear side is pushed out by press means to form dimples (19) bounded by the slits (18). Thus, slits (18) are formed in one body at both sides of the dimples (19). With this construction, a thin surface mount type semiconductor device (121) has a sufficient mechanical strength, and is capable of controlling the stress in a narrow region, so that a semiconductor device (21) of high reliability is realized. <IMAGE>
申请公布号 DE69227937(D1) 申请公布日期 1999.02.04
申请号 DE1992627937 申请日期 1992.02.12
申请人 MATSUSHITA ELECTRONICS CORP., KADOMA, OSAKA, JP 发明人 NOSE, SACHIYUKI, NAGAOKAKYOU-SHI, KYOTO 617, JP
分类号 H01L23/495 主分类号 H01L23/495
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