SIGNAL CLAMPING CIRCUIT WITH LEVEL SHIFTING AND ERROR DETECTION FOR MULTIPLE INPUTS

摘要

An electronic circuit for keeping a transistor (236) from saturating while minimizing the time required for the transistor to transition between a conducting state and non-conducting state by having an open-loop clamping circuit (D1) connected between a first terminal of the transistor (C) and a first voltage source (+VCC), wherein the clamping circuit (D1) is operable in a first mode to isolate the first signal terminal (C) from the first voltage source (+VCC) and in a second mode to present an impedance between the first terminal (C) and the first voltage source (+VCC) to limit the voltage on the first signal terminal (C) to a selected value.