发明名称 ABSOLUTE PHASE PROCESSING SYNCHRONIZATION ACQUISITION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the absolute phase processing synchronization acquisition circuit whose circuit scale is enough to be small. SOLUTION: The absolute phase processing synchronization acquisition circuit is provided with accumulated addition/subtraction averaging circuits 85A, 85B that extracts a bit stream of a frame synchronizing signal from a base band signal demodulated by a demodulation circuit 1 over a frame synchronizing signal period, conducts addition processing when a bit stream of an extracted frame synchronizing signal is logical '1', conducts subtraction processing when the bit stream of the extracted frame synchronizing signal is logical '0', and average the addition subtraction processing results. Then the absolute phase processing synchronization acquisition circuit discriminates a phase of a received signal based on an output of accumulated addition subtraction averaging processing by the accumulated addition/subtraction averaging circuits 85A, 85B to rotate a phase of the demodulated base band signal by a discriminated phase.
申请公布号 JPH1127336(A) 申请公布日期 1999.01.29
申请号 JP19970187177 申请日期 1997.06.30
申请人 KENWOOD CORP 发明人 HORII AKIHIRO;SHIRAISHI KENICHI
分类号 H04L27/22;H04L7/00;H04L7/08 主分类号 H04L27/22
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