发明名称 MICROPROCESSOR PREFETCHING PARALLELLY DATA FOR INSTRUCTION, USING DATA USED MOST LATELY AND EXECUTING INFERENTIALLY INSTRUCTION AND ITS OPERATION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To obtain a method which operates a microprocessor having an accumulation supply source on a chip by prefetching parallelly data for an instruction, using data that are used the most lately and executing inferentially the instruction. SOLUTION: A system no includes a microprocessor 12, has a bus B and is connected to various external devices. The microprocessor 12 reads memory hierarchy to an accumulation system and includes a hierarchy on which data are written. The system 10 further includes L2 universal cache 20 and is connected to L1 data cache 18 through a bus 21. The cache 20 includes an access controller 22. The controller 22 receives such requests to access the cache 20, and there, the requests fetch or prefetch information from the cache 20.</p>
申请公布号 JPH1124924(A) 申请公布日期 1999.01.29
申请号 JP19980031915 申请日期 1998.01.05
申请人 TEXAS INSTR INC <TI> 发明人 CAI GEORGE Z N;SHIELL JONATHAN H
分类号 G06F9/318;G06F9/38;G06F12/08;(IPC1-7):G06F9/38 主分类号 G06F9/318
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