发明名称 MONITORING CIRCUIT OF THE NUMBER OF ERRORS GENERATED IN UNIT TIME IN SERIAL SIGNAL
摘要 PROBLEM TO BE SOLVED: To monitor a fact that the number of bit errors of a serial signal per unit time is equal to or more than a predetermined value in real time by detecting a state of a counter value of a specified notation counter. SOLUTION: When the serial signal is inputted in a start flag generation part 1 and an error bit '1' is detected, the start flags are sequentially generated from the first one ofβoutput lines. When the start flags are received, '0' is loaded, count is simultaneously started by being synchronized with a bit signal of the serial signal and the count is stopped when the count shows the counter value of (α+1) by an (α+1)-ary counter 2. Monitoring results to represent thatβpieces or more bit errors are generated in the unit time (αbit) when a fact that all the counter values of the (α+1)-ary counter 2 show 'the initial value ('0') <= the counter value <=α' is detected and in addition, to represent thatβpieces or less bit errors are generated when only one counter with the counter value ofα+1 exists respectively are outputted by a counter value monitoring device 3.
申请公布号 JPH1127242(A) 申请公布日期 1999.01.29
申请号 JP19970181634 申请日期 1997.07.08
申请人 FUJITSU LTD 发明人 MATSUMOTO YUICHI;UENO YASUNORI;WANI KAZUO
分类号 H04L1/00;H04L25/02;(IPC1-7):H04L1/00 主分类号 H04L1/00
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