| 摘要 |
PROBLEM TO BE SOLVED: To shorten the number of cycles required for an arithmetic operation of an inverse square root. SOLUTION: A corrected upper bit part U is generated by adding bit whose value is 1 at a lower side of upper u digits of data X by a merge circuit 16. A bit Xu+1 is outputted as it is, Xu+1 to X1 are inverted by the correction circuit 11, outputs YU+1 to X1 of the correction circuit 11 and upper u digits of the data X are merged and one digit of data to represent difference data (U-L/2) is generated by a merge circuit 15. In this case, L=X-U and a corrected lower bit part. An approximated value of 3×L×L/8 for the bits Xu to Xm is outputted by a reference table 14. A sum of products operation for the three pieces of data is executed by an arithmetic unit 2. After that, an approximated value of a function 1/(U×U×√U) is supplied to the upper u digits of numerical data X to be operated by a reference table 13, the operation result in a register 5 is selected by a selector 12, a constant zero is selected by a selector 22, the second sum of products operation is executed and the inverse square root is obtained.
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