发明名称 BACK BIAS GENERATOR FOR SEMICONDUCTOR DEVICE AND ITS GENERATING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To improve back bias supply ability by providing an oscillator, a power voltage generator, a well bias generator, a logic gate, a pumping capacitor and a transmission transistor for a back bias generator. SOLUTION: An oscillator 111 constituting a back bias generator 105 generates a clock signal and a power voltage generator 113 generates voltage which becomes high when power voltage Vcc becomes a prescribed level. A logic gate 115 outputs the inverse of AND being the output of the power voltage generator 113. A pumping capacitor Cp1 accumulates charges and outputs negative pumping voltage when the voltage level outputted from the logic gate 115 is low. Clamping/transmission transistors 117 and 139 are constituted of NMOS transistors. The input terminal of a well bias generator 120 is connected to the output terminal of the oscillator 111 and an output terminal is connected to the bulk of the transmission transistor 139 and the bulk of the clamping transistor 117 in common.</p>
申请公布号 JPH1126697(A) 申请公布日期 1999.01.29
申请号 JP19980074525 申请日期 1998.03.23
申请人 SAMSUNG ELECTRON CO LTD 发明人 LEE GYU-CHAN;IN KOICHI
分类号 H01L27/04;G05F3/20;H01L21/822;(IPC1-7):H01L27/04 主分类号 H01L27/04
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