| 摘要 |
<p>Apparatus and method are disclosed for successive approximation analog-to-digital conversion of a variable analog input voltage to digital form by periodic sampling thereof, using a comparator to compare the relative values of the analog input voltage amplitude in a predetermined time interval and the upper limit of a reference voltage range which is successively adjusted until it closely approximates the digital value of the sampled analog input voltage in that time interval. The successive adjustment is performed by a successive approximation register which has an odd number of multiple stages, at least three, for each digital significant bit representing the upper limit of the reference voltage range to be used in the comparison. The accuracy and reliability of this upper limit is refined by using as the value of each significant bit the majority of its value in the multiple stages. After a number of comparisons that fixes the majority value of each significant bit, the resulting succession of the significant bits becomes the digital conversion of the analog input voltage in the respective time interval.</p> |
