发明名称 HORIZONTAL DEFLECTION OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a horizontal deflection output circuit capable of reducing power loss for the entire circuit, even if a horizontal deflection frequency is high. SOLUTION: A first switching circuit is constituted of a parallel circuit of a bipolar transistor 11 and a damper diode 13, and a second switching circuit is constituted of a parallel circuit of an FET 19 and a damper diode 21. Resonance capacitors 14, 22, 15 are connected with the first and the second switching circuits. The circuit is constituted so that a time when the drain current of the FET 19 is turned off is placed within the falling time of collector current of the bipolar transistor 11 or within a period to precede a starting point of the falling time by only a time interval which is almost equivalent to the length of the falling time.
申请公布号 JPH1127554(A) 申请公布日期 1999.01.29
申请号 JP19970196458 申请日期 1997.07.07
申请人 VICTOR CO OF JAPAN LTD 发明人 KASHIWAGI SHIGERU
分类号 H04N3/16;(IPC1-7):H04N3/16 主分类号 H04N3/16
代理机构 代理人
主权项
地址
您可能感兴趣的专利