A METHOD AND APPARATUS FOR SYNCHRONIZING A CONTROL SIGNAL

摘要

A synchronization circuit for gradually shifting the phase domain of a control signal (530) to permit synchronization of a signal with a clock signal (500) in a different phase domain in a system with a single frequency, but arbitrary phase relationship. The present invention allows a control signal (530) in the phase domain of an internal clock to be synchronized with an external clock (500), when the phase domain of the external clock differs substantially from that of the internal clock. In synchronizing the control signal (530) to the external clock (500), the present invention avoids the generation of runt pulses while providing a control signal synchronized to the external clock in the least amount of time feasible (i.e. lowest latency time). Because the present invention has no failure modes due to timing relationships, MTBF is infinite for failures caused by such relationships and therefore need not be a concern. This also implies that no risk is posed to the proper operation of the circuits driven thereby.