| 摘要 |
In a random access memory for enabling read operations and write operations to be carried out simultaneously, the memory cell matrix either is divided into a plurality of banks, each bank including a write enable signal line, an out enable signal line, a data input/output line, a row address designation circuit, a column address designation circuit, a read/write control circuit, an input data buffer circuit, and an output data buffer circuit; or includes separate row address designation circuits for reading and writing and separate column address designation circuits for reading and writing.
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