发明名称 UNEVEN ACCESS MEMORY AND INFORMATION PROCESSING MACHINE HAVING CACHE MEMORY COHERENCE
摘要 PROBLEM TO BE SOLVED: To improve the performance of a multiprocessor system having a memory whose access frequency is not even by preparing a 2nd means which detects that the activity value measured by a 1st means exceeded its threshold. SOLUTION: An information processing machine has a device 6 which consists of plural modules and secures the coherence of data between a module and others, an uneven access memory and the cache memory coherence. A 1st register 101 of the device 6 stores a 1st physical address of a memory, a 2nd register 102 stores a 2nd physical address of the memory, and a counter 111 serving as a 1st means measures the activity value concerning the data whose address is included between the 1st and 2nd physical addresses. A 3rd register 109 stores the threshold to measure the said activity value, and a counter 121 serving as a 2nd means detects that the activity value measured by another counter exceeded its threshold.
申请公布号 JPH1115735(A) 申请公布日期 1999.01.22
申请号 JP19980153260 申请日期 1998.06.02
申请人 BULL SA 发明人 BORDAZ THIERRY;SORACE JEAN-DOMINIQUE;RAISON HENRI
分类号 G06F11/34;G06F12/08;(IPC1-7):G06F12/08;G06F15/163 主分类号 G06F11/34
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