发明名称 PICTURE REDUCING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a picture reducing circuit capable of suppressing the deterioration of a picture by more simple hardware constitution even when a reduction ratio is large and improving the quality of a picture. SOLUTION: In the circuit, a thinning timing generation circuit 102 generates a thinning timing signal PUT for thinning N digital pixel data from M (M=4) continuous digital pixel data based on an N-times (N=2) frequency clock NCLK. Then N digital pixel data thinned based on the signal PUT are respectively stored in 1st and 2nd memories 105, 106 and an weighted mean part 107 finds out the weighted mean of the N stored thinned pixel, data, so that a reduced picture reduced from the input digital pixel data to 1/M can be obtained.
申请公布号 JPH1115964(A) 申请公布日期 1999.01.22
申请号 JP19970185847 申请日期 1997.06.26
申请人 NEC HOME ELECTRON LTD 发明人 WATANABE TADAYOSHI
分类号 H04N1/393;G06T3/40 主分类号 H04N1/393
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