POWER STABILIZING CIRCUIT AND PLL CIRCUIT PROVIDED WITH THE POWER STABILIZING CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a power stabilizing circuit which is provided in a normal digital signal processing semiconductor integrated circuit chip and supplies the stabilized power to a circuit (e.g. a voltage control oscillator in a PLL circuit) that must evade the sudden fluctuation of power voltage. SOLUTION: A reference voltage generation circuit 120 which generates reference voltage 173 is connected between the high and low potential sides 170 and 160 of the power supplied from the outside. A P-channel MOS transistor TR 100 is connected in series between the side 170 and a load circuit 110. A voltage comparator 130 compares the voltage 171 applied to the circuit 110 with the voltage 173, and the output of the comparator 130 is supplied to the gate of the TR 100. Thus, the TR 100 is controlled and the voltage applied to the circuit 110 is kept at a constant level. The circuit 120 consists of the resistive potential dividing circuits 121 and 122 and the LPF 123 and 124.