发明名称 DATA JUDGEMENT CIRCUIT AND DATA JUDGEMENT METHOD
摘要 <p>PROBLEM TO BE SOLVED: To enable the high speed operation of the judgement of read data even if the data are reverse data of the data of a previous cycle. SOLUTION: The potential of a bit line 11 is subjected to feedback control in accordance with its potential fluctuation by a bias circuit 13. On the other hand, the data previously read out into the bit line 11 are temporarily held by a D-type flip-flop 16 and the offset is given to a reference voltage Vref determined by the bias circuit 13 by an offset circuit 15 making reference to the previous data values held by the D-type flip-flop 16.</p>
申请公布号 JPH1116370(A) 申请公布日期 1999.01.22
申请号 JP19970163695 申请日期 1997.06.20
申请人 SONY CORP 发明人 HASHIGUCHI AKIHIKO
分类号 G11C11/419;G11C7/06;G11C16/06;(IPC1-7):G11C11/419 主分类号 G11C11/419
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