| 摘要 |
PROBLEM TO BE SOLVED: To simplify wiring layout within chips by avoiding crosstalk by clock signal without delay in clock signal. SOLUTION: In an integrated circuit which operates respective internal circuits 3, 4, 5, 6 having predetermined functions based on a clock signal generated by clock generating means 12, 13, provided are light-emitting means 15 which is arranged in response to clock generating means 12, 13, converts the clock signal and radiates it, and at least one light-receiving means 16 which receives light from the light-emitting means 15, converts it to electric signals and supplies the electric signals as clock signals to the internal circuits 3 to 6. |
