发明名称 FERROELECTRIC MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To stabilize a reference voltage regardless of the variation in characteristics which is produced at the time of manufacture and after a long term usage by a method wherein a voltage which is obtained by adding a minimum voltage enabling the reading of a signal voltage generated by signal charge in a memory cell in a non-reverse state to the signal voltage. SOLUTION: A data '0' is written in dummy memory cell capacitors DFC11, DFC21, DFC12 and DCF22 beforehand. In a reading operation, a data is outputted to a bit line BL1 from a ferroelectric memory cell MC11. Signal charge corresponding to the data '0' is outputted to a bit line/BL1 from the capacitor DFC21 of a dummy memory cell DC1. Further, by the capacitance coupling with a dummy memory cell plate line DPL2 through a dummy memory cell capacitor 41, the voltage of the bit line/BL1 is elevated to a value higher than the threshold voltage of a sensing amplifier circuit SAMP1.
申请公布号 JPH1116377(A) 申请公布日期 1999.01.22
申请号 JP19970168939 申请日期 1997.06.25
申请人 NEC CORP 发明人 KOIKE HIRONORI
分类号 G11C14/00;G11C11/22;H01L21/8242;H01L21/8246;H01L21/8247;H01L27/10;H01L27/105;H01L27/108;H01L29/788;H01L29/792 主分类号 G11C14/00
代理机构 代理人
主权项
地址