| 摘要 |
PROBLEM TO BE SOLVED: To provide a high reliability semiconductor memory device which enables the improvement of the precision of error detection of data read out of a memory cell and the proper error correction. SOLUTION: Reverse parity signals which are generated by a parity generating circuit 2 in accordance with logic reverse data signals from a 1st reverse circuit 1 and a Hamming matrix are stored in a memory cell array 3 with input data signals DA0-DA31 and parity signals. The reading levels of all the bits of the input data signals DA0-DA31 stored in the memory cell array 3 are respectively reversed in relations to the judging voltage of a sensing circuit 5 by a 2nd reverse circuit 4. If a syndrome judgement circuit 7 judges that 1st and 2nd syndrome signals generated by a syndrome generating circuit 6 agree with each other and, further, there are errors in reading data signals and reading reverse data signals, a correction circuit 9 corrects the errors in the reading data signals D0-D31 in accordance with correction signals from a correction signal generating circuit 8. |
