SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device containing a synchronous circuit which can extend the operating frequency range in a comparatively simple circuit scale and also can have a stable operation and another synchronous circuit which can shorten the lock-in cycle and also has a stable operation. SOLUTION: This circuit device uses the variable delay circuits VDL1 to VDL4 which receive the clock signals from a 1st terminal and delay these signals in response to a control signal having the binary weight and performs the comparison of phases between the clock signals supplied from the 1st terminal and the clock signals delayed by the circuits VDL1 to VDL4 via a phase comparator PD to supply the output signals of comparison to a delay control circuit VDLC. When the said operation is started, the bits of a delay control signal are successively set in order of higher bits and then reset if the delayed signals are later than the clock signals supplied from the 1st terminal by the output of the comparator PD. If the delayed signals are earlier than the clock signals, a delay control signal is produced to set its bits and to supply them to the circuits VDL1 to VDL4.