发明名称 TEST CIRCUIT
摘要 PROBLEM TO BE SOLVED: To shorten the time required for forming a test pattern by providing means for measuring the voltage difference level characteristics between a drive voltage terminal and a segment terminal, and a test means dedicated for measuring the voltage difference level characteristics between the drive voltage terminal and a common terminal. SOLUTION: A selector 36 is inserted between a control circuit 2 and a selector 4 and between a control circuit 3 and a selector 5 and a test circuit 37 outputs test signals 32-35 to the selector 36, based on the signals at the test terminals 28-31. The test circuit 37 comprises the test terminals 28-31, latches 38, 39, AND gates 40-44, inverters 45, 46, and terminals 32-35. The latches 38, 39 latch the signals at the terminals 30, 31 with the output from the AND gate 40 receiving signals from the terminals 28, 29. The AND gates 41-44 produce the logical products of the outputs from the latches 38, 39, one inverted output and the other output, and both inverted outputs and deliver the logical product to the terminals 32-35. The output terminals 32-35 from the test circuit 37 determine a test mode.
申请公布号 JPH1114685(A) 申请公布日期 1999.01.22
申请号 JP19970180464 申请日期 1997.06.20
申请人 NEC CORP 发明人 YOSHIDA YUJI
分类号 G01R31/00;G02F1/13;G02F1/1345;G06F11/22;G09G3/18 主分类号 G01R31/00
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