发明名称 STRUCTURE OF MOUNTING CHIP
摘要 PROBLEM TO BE SOLVED: To enable a reduction in the cost for forming bumps and to make it possible to absorb an error at the time of a flip-chip mounting of a chip on an electric circuit board by a method wherein with projection parts formed in the connection part of the board with the chip, electrode parts are respectively formed on the projection parts and electrode parts on the chip are electrically connected with these electrode parts. SOLUTION: A chip 1 is subjected to flip-chip mounting on an electric circuit board 9 using an anisotropic conductive film (ACF). Bumps 5, which are formed on the board 9 and have a flexibility, are provided on electrodes 6 formed on projections 7 consisting of a photosensitive, epoxy resin. That is, the bumps 6 are provided on the electrodes 6 formed on the projections 7 in the connection part of the board 9 to be mounted with the chip 1 with the chip 1. Electrodes 2 on the chip 1 are electrically connected with the electrodes 6 formed on the projections 7. Thereby, a reduction in the cost for forming the bumps 5 is possible and even though a control of the points of the stud bumps and the flatness of chip mounting pads on the board 9 is not executed, an error can be absorbed at the time of the flip-chip mounting.
申请公布号 JPH1116950(A) 申请公布日期 1999.01.22
申请号 JP19970169827 申请日期 1997.06.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MURAHATA TAKAYOSHI;TAKEDA MASATOSHI
分类号 H01L21/60;H05K1/11;H05K1/18;H05K3/32;H05K3/40;(IPC1-7):H01L21/60 主分类号 H01L21/60
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