| 摘要 |
PROBLEM TO BE SOLVED: To reduce the area of memory cells by regulating a cell pattern in such a manner that a channel length of a MOS transistor for storing charges and driving read data lines is made smaller than the width across which a gate overlaps a transistor region. SOLUTION: A gate polysilicon 3 is arranged on a transistor region 1 through an insulating film such as an oxide film, the region 1 being formed on a silicon substrate. Then, the shape of the polysilicon 3 is regulated in such a manner that a gate region that is an overlap 9 between the polysilicon 3 and the region 1 is formed of a dimensionally narrow portion A and a wide portion excluding the narrow portion from the gate region 9. When a predetermined high voltage is applied to the thus regulated polysilicon 3, a channel is formed, and electrons are caused to flow from a source region 5 to a drain region 7 via such channel to establish continuity. |
