MEMORY LOGIC COMPOSITE SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a memory logic composite semiconductor device having first and second memories, a pad, a logic, and a test control circuit. SOLUTION: Memory data signals inputted to first and second memories 17, 19 and outputted from the first and second memories 17, 19 are applied to a plurality of pads 7 to 10. A logic 15 controls the first and the second memories 17, 19. A test control circuit 13 transmits a memory control signal and the memory data signals to the first and the second memories 17, 19, when testing the first and second memories 17, 19. The test control circuit 13 transmits the memory control signal and the memory data signals to the logic 15, when normally operating the first and the second memories 17, 19. Thus, the internal memories can be tested by using the existing pads without adding pads 7 to 10. Therefore, the internal memories can be tested without increasing the cost. Also, regardless of the number of memories, the memory test time is significantly reduced.