| 摘要 |
PURPOSE:To easily prepare a writing procedure by providing an address part inputting a test mode signal only by a prescribed address, and writing the address while increasing it from outside. CONSTITUTION:The address part 2 outputs a counting output at the prescribed counted value of an address increment clock signal SAC to a preset counter 4 which incorporates a 1 bit address counter 3 and (n-1)-bit counter AC14. The counter 3 inputs the signal of the counter 4, and designates the least signifi cant address of the (n) bits. And the counter AC14 inputs the signal SAC and outputs the signal designating address of high-order (n-1) bits. Consequently, by providing the address part 2 inputting the test mode signal only with the address writing the checker pattern data to a cell of EPROM 1 is selected. In such a manner, by only writing the address while increasing the address from outside the data can be written to the ROM 1, the writing procedure is easily prepared. |
