发明名称 MULTILAYERED PRINTED WIRING BOARD FOR MOUNTING SEMICONDUCTOR PACKAGE
摘要 <p>PROBLEM TO BE SOLVED: To enable mounting lands for a semiconductor package to be lessened in pitches in between by a method, wherein an intermediate connector obtained by filling a conductive paste into a through-hole provided to a compressive porous board is pasted on each side of a printed wiring board, and a metallic foil is pasted on each surface to form circuit patterns. SOLUTION: Mounting lands 8, electrically connected to the mounting terminals 7 of a semiconductor package 6, are formed into a prescribed wiring through an circuit pattern 2 and vias 4, in accordance with a design drawing. At this point, a wiring can be laid out extending to an arbitrary layer via the intermediary of a via 4 under the mounting land 8 so as to be connected to another part extending from the mounting lands 8 arranged as in a surface lattice, so that a circuit pattern or a plating through-hole can be dispensed with on the mounting surface of a mounting region. Therefore, a pitch between the adjacent mounting lands 8 can be narrowed extremely than conventionally, so that the semiconductor package 6 which is extremely smaller than the conventional case can be mounted.</p>
申请公布号 JPH118475(A) 申请公布日期 1999.01.12
申请号 JP19970159439 申请日期 1997.06.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUDA TOSHIMITSU
分类号 H05K3/46;H01L23/12;H01L23/50;(IPC1-7):H05K3/46 主分类号 H05K3/46
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