| 摘要 |
<p>PROBLEM TO BE SOLVED: To easily control the write operation of a nonvolatile semiconductor memory device which comprises a floating gate. SOLUTION: A word line 31 is connected to the control gate of a memory cell transistor 30. A bit line 32 and a source line 33 are connected to the source side and the drain side. A write clockϕW which has a definite peak value is applied to the source line 33. A comparison circuit 34 and a write/read control circuit 35 are connected to the bit line 32. The comparison circuit 34 compares a bit-line potential VBL with an input-information potential VIN so as to generate a judgment output C0 . The write/read control circuit 35 is initialized by a reset clockϕP, it supplies a power-supply potential during the rise period of a read clockϕR, it supplies a ground potential when the judgment output C0 is at a high level, and it supplies the power-supply potential when the judgment output is at a low level during the fall period of the read clock.</p> |
