发明名称 |
High speed FIFO mark and retransmit scheme using latches and precharge |
摘要 |
The present invention provides a look ahead architecture to satisfy the retransmit recovery time constraints in a mark and retransmit system while allowing a full bitline precharge. A number of sense amplifiers are provided in the look ahead architecture that may be equipped with a "shadow latch" to store the read data when the mark pointer is asserted. As a result, the data to be retransmitted will be retrieved from the shadow latches when the retransmit is asserted, allowing a full precharge cycle before reading from the memory array.
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申请公布号 |
US5860160(A) |
申请公布日期 |
1999.01.12 |
申请号 |
US19960768407 |
申请日期 |
1996.12.18 |
申请人 |
CYPRESS SEMICONDUCTOR CORP. |
发明人 |
NARAYANA, PIDUGU L.;CRESS, DANIEL ERIC;HAWKINS, ANDREW L.;WU, PING |
分类号 |
G06F7/78;(IPC1-7):G06F12/00 |
主分类号 |
G06F7/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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