IMAGE COMPRESSING AND EXPANDING DEVICE

摘要

PROBLEM TO BE SOLVED: To process a video signal without using a frame buffer not an FIFO. SOLUTION: A data enable generation circuit 106 generates a data enable signal only while an input video signal is effective based on horizontal synchronizing (HSYNC) signal and a vertical synchronizing (NSYNE) signal at the time of compression, and each signal processor 103-1 to 103-3 in a compressing device processes inputted image data through pipeline processing. Each internal deciding device 104 processes data only when data is valid, and an internal delaying device 105a on each stage holds data until the next valid signal comes when data is not valid. Each pipeline delivers only valid data and asures an ineffective period for a fixed period in input-output of data.