| 摘要 |
A first CELP coding circuit receiving a signal obtained by down-sampling of an input signal by a down-sampling circuit, outputs a part of coded output to a second CELP coding circuit. The second CELP coding circuit encodes the input signal on the basis of the coded output of the first CELP coding circuit. A multiplexer outputs the coded outputs of the first and second CELP coding circuits in a form of a bit stream/ A demultiplexer outputs the coded output of the first CELP coding circuit from the bit stream to a first CELP decoding circuit when a control signal is low bit rate, and extracts a part of the output of the first CELP coding circuit and the output of the second CELP coding circuit to output to a second CELP decoding circuit to output via a switch circuit when the control signal is high bit rate.
|
