| 摘要 |
The memory provides sequential access and comprises N register elements, each memorising an information bit, and distributed in L groups each consisting of P elements. The P elements are connected in series and may be, but need not be simultaneously activated. L groups of P elements total the N elements (N=L x P). The register elements of one given group are activated at least P times consecutively, but are not activated during the remainder of the time. This co-operates with each memorised group of P elements of information bits being presented in serial form at the input (E) of the memory. The activation of the P elements is controlled by a clock signal, such that P clock periods are required to activate the complete group of elements. |
