发明名称 MEMORY MODULE AND DATA PROCESSING SYSTEM
摘要 <p>A memory module enabling a high speed access. A memory module (MODa) has converters (3, 4) including register buffers (RBUFa0-RBUFa15) that are provided between data buses (7L, 7H) connected to a plurality of parallelly operated semiconductor memory devices (M0-M7) and external data input/output terminals (DQ0-DQ31). Because the bus connection between the inside and the outside of the memory module is buffered by the register buffers, the data buses on the mother board is separated from the data buses on the memory module. Thus, the data buses on the mother board no longer see the load of wiring after the buffer registers, so that the load that should be driven by the memory controller can be reduced, thus facilitating improvement in the data transfer frequency on the memory buses.</p>
申请公布号 WO1999000734(P1) 申请公布日期 1999.01.07
申请号 JP1998002866 申请日期 1998.06.26
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