| 摘要 |
<p>An on-chip system receives raw positive and negative voltages from voltage pumps (160, 210, 240) and provides CMOS-compatible bandgap-type positive and negative reference voltages from which a regulated positive and negative Vpp and Vpn voltages are generated. A bitline (BL) regulator (170) and a sourceline (SL) regulator (180) receive Vpp and generate a plurality of BL voltages and SL voltages. The system includes positive and negative wordline (WL) regulators (250) that each use feedback from selected WL nodes. The system further includes a WL detector (260) and magnitude detector (265) for Vdd and Vpp, and can accommodate multiple level memory (MLC) cells by slewing reference voltages used to output regulated voltages. The system preferably is fabricated on the same IC chip as the address logic and memory array using the regulated potentials.</p> |
