发明名称 MEMORY CONTROL SYSTEM
摘要 PROBLEM TO BE SOLVED: To improve both fault tolerance and reliability of a memory control system by copying the contents of a memory area including a part where an error occurred to an idle area of a memory. SOLUTION: The data are read out of a memory module d(n) and checked by an ECC control part of an ECC control circuit 2. If a 1-bit error is detected, the value of a counter c(n) corresponding to the module d(n) is increased by one. Then a threshold decision circuit 4 decides the couture c(n) reaches its threshold. When an ECC 1-bit error counter (c) exceeds its threshold, it's decided that the module d(n) has an error and the circuit 4 notifies a CPU 6 of this error. The circuit 2 reports the address information showing occurrence of the error to an OS. Receiving the address information, the OS transmits the error (1), analyzes the error factor (2), acquires an address (3), decides an idle area (4), copies the data (5) and invalidates the error occurring area (6). Thus, a memory area including the error part is invalidated.
申请公布号 JPH113290(A) 申请公布日期 1999.01.06
申请号 JP19970153308 申请日期 1997.06.11
申请人 HITACHI LTD 发明人 KATO MITSUHIRO;MORIYAMA TAKASHI;HISADA YOSHIAKI
分类号 G06F12/16 主分类号 G06F12/16
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