| 摘要 |
PROBLEM TO BE SOLVED: To provide many serial scanning cells and to prevent the generation of the delay of boundary scanning. SOLUTION: This smart debugging interface circuit 203 is provided with an instruction register and a data register and the instruction register and the data register are connected to one interface port. The interface port connects the smart debugging interface circuit 203 to a host computer system 204. A control logic circuit is connected to the instruction register, the data register and the interface port. The control logic circuit interfaces the debugging program of the host computer system 204 to a programmable digital processor. Further, the debugging program and the programmable digital processor are interfaced without generating the boundary scanning delay in an instruction bus 205 or a data bus 207. |
