发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS INITIALIZATION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and its initializing method in which memory size is not increased and a test vector of memory capacity is not required to run in fault detection. SOLUTION: This integrated circuit has a memory circuit which has such constitution that an output of a first inverter circuit INV1a formed by connecting complimentarily with a N type MOSFET and a P type MOSFET is made an input of a second inverter circuit INV2a formed by connecting complimentarily with a N type MOSFET and a P type MOSFET, and in which memory cells are arranged in rows and columns. In this case, a resistance element R is connected in series to a drain side or a source side of the N type MOSFET or the P type MOSFET of the first or the second inverter circuits, and desired data is written in each memory cell by controlling a power source voltage.</p>
申请公布号 JPH113591(A) 申请公布日期 1999.01.06
申请号 JP19970154621 申请日期 1997.06.12
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 IDA NOBUO
分类号 G11C11/41;G06F1/24;(IPC1-7):G11C11/41 主分类号 G11C11/41
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