发明名称 Circuit architecture for processing multichannel frames of synchronous digital signals with a broadband, particularly for a SONET/SDH standard
摘要 <p>The invention relates to a circuit architecture for processing multi-channel frames of broadband synchronous digital signals, in particular signals of the SONET/SDH standard, being of a type which comprises an input portion (3) and an output portion (4). It is characterized by being constructed of at least one modular component (2) adapted to process frames comprising a single channel and connectable modularly to N further identical components corresponding to the number of frame channels. &lt;IMAGE&gt;</p>
申请公布号 EP0887959(A1) 申请公布日期 1998.12.30
申请号 EP19970830310 申请日期 1997.06.27
申请人 STMICROELECTRONICS S.R.L. 发明人 DELL'ORO, ANNALISA;VEGGETTI, ANDREA
分类号 H04J3/00;H04J3/16;H04Q11/04;(IPC1-7):H04J3/00 主分类号 H04J3/00
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