| 摘要 |
<p>One or more memory-device-side processors which can access the memory device belong to one group. Common memories and cache memories are allotted to the respective groups. When the access to the memory device is requested by a host-side processor, the memory-device-side processor of the group to which the memory device belongs informs the host-side processor of the stored cache address or the cache address to be stored and the data length. The host-side processor reads data at the address or writes data into the address. Thus, the access neck of the common memory and the cache memory is reduced and the system throughput is improved.</p> |
