Transceiver circuit for connection of a base station to a base station controller according to the DECT standard

摘要

The master circuit includes a numerical phase locked loop, designed to reconstruct a clock (RxCK) from a flow of input bits. The difference in phase between the reconstructed clock and an internal clock (TxCK) corresponds to the contents of a phase counter (32) contained in the phase locked loop. The circuit also has a bit counter (40) timed by the internal clock, initiated on the transmission of a predetermined signal (sfsx) and halted on the detection of a return signal (sfsr) retransmitted by the slave circuit. A calculator (42) is provided for the delay introduced by the telephone line from the contents of the phase and bit counters.