发明名称 Memory capacity test method and computer system
摘要 A memory capacity test method capable of confirming the memory capacity of an actually mounted memory in a short time in a memory system which mounts a memory only on a portion of a memory space. The method writes first data to a check address which is an n-th power of two, and then second data to the address 0, where the second data differs from the first data, and decides that the memory is not mounted on the check address if the data read from the check address disagrees with the first data. This is based on the fact that the check address actually points the address 0 when the memory is not mounted on the check address of the nth power of two, and hence the second data is written over the first data on the address 0 in that case.
申请公布号 US5854795(A) 申请公布日期 1998.12.29
申请号 US19970801919 申请日期 1997.02.14
申请人 KIKUSUI ELECTRONICS CORPORATION 发明人 OSANO, YUICHI
分类号 G06F12/16;G06F11/22;G06F12/06;G11C29/08;(IPC1-7):G11C29/00 主分类号 G06F12/16
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