| 摘要 |
The invention concerns a device for exchanging asynchronous data between two microprocessors (10, 20) through an interface consisting of a random access memory (30). The invention is characterised in that said random access memory has a single access controlled by one of said microprocessors, called master microprocessor (10). Each instruction executed by said master microprocessor comprises execution cycles followed by at least two read-write data exchange cycles with the second microprocessor, called slave microprocessor (20) and the master microprocessor (10) is capable of prolonging the slave microprocessor (20) access time to the random access memory until the end of the last data exchange cycle (AM-R).
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