Time multiplexed scheme for deadlock resolution in distributed arbitration

摘要

An arbitration system (10) resolves bus contention problems by assigning an exclusive portion (PHS or PHA) of a clock signal (CLK) to a corresponding arbiter. The system includes shared resources and one or more requesting agents (26 or 28) that require access to more than one of the shared resources. The system uses two arbiters (44 and 46), each which communicate the status of a respective shared bus to the other arbiter. A first agent (26 or 28) requesting access to a first bus (S bus) is only granted access during a first portion (PHS) of a clock signal and based on the availability of a second bus (A bus). A second agent (434, 36, 38, 40, or 42) requesting access to a second bus is only granted access during a second portion (PHA) of the clock signal and based on an availability of the first bus (S bus). <IMAGE>