发明名称 PHASE LOCKED LOOP CIRCUIT UTILIZING SCHMITT TRIGGER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To attain a very small steady-state phase error with the input of a phase comparator block within a PLL lock voltage range. SOLUTION: Each Schmitt trigger circuit in a Schmitt trigger circuit block has a hysteresis quantity which varies depending not only upon the temperature and voltage factor of the input voltage, but also upon the damping coefficient Z(ζ) of a PLL. The center points of the positive and negative thresholds of the hysteresis curve of each Schmitt trigger circuit are set by the current-voltage characteristic of a charge pump circuit in a charge pump circuit block. The Schmitt trigger circuit block instructs a control logic circuit to turn on or off a PMOS pump UP transistor and NMOS pump DOWN transistor in the charge pump block so as to control the aspect ratio of the PMOS pump UP transistor against that of the NMOS pump DOWN transistor.
申请公布号 JPH10336021(A) 申请公布日期 1998.12.18
申请号 JP19970140289 申请日期 1997.05.29
申请人 NEC CORP 发明人 EUGENE O SULLIVAN
分类号 H03L7/08;H03L7/089;H03L7/093;H03L7/183 主分类号 H03L7/08
代理机构 代理人
主权项
地址