发明名称 NOR TYPE SEMICONDUCTOR MEMORY APPARATUS AND DATA READ METHOD THEREOF
摘要 <p>PROBLEM TO BE SOLVED: To improve a sensing margin to an off cell by impressing the same voltage to main bit lines excluding word lines and a source line or a higher voltage than that of the word lines to the main bit lines. SOLUTION: A NOR type mask ROM is constituted of a cell array 100, an address buffer circuit 200, a voltage generation circuit 300, a block and word line selection circuit 400, a column selection circuit 500, a column selection- switching circuit 600 and a sensing and precharging circuit 700. The array 100 has a NOR type memory cell, comprising a plurality of array blocks 110 divided in a column direction. A row address RA is input from the address buffer circuit 200 to the block and word line selection circuit 400, whereby a selection signal BLOCKi for selecting one of the array blocks 110 of the array 100, etc., is output from the selection circuit 400.</p>
申请公布号 JPH10334679(A) 申请公布日期 1998.12.18
申请号 JP19980095523 申请日期 1998.04.08
申请人 SAMSUNG ELECTRON CO LTD 发明人 CHOI BAIENG-SAN
分类号 G11C16/04;G11C16/06;G11C17/00;G11C17/12;G11C17/18;H01L21/8247;H01L27/115;(IPC1-7):G11C16/04 主分类号 G11C16/04
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